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32 Commits

Author SHA1 Message Date
XinyuYe-Intel
28f9c31129 textgen ollama code refactor. (#1158) 
Remove Ollama folder since default openai API is able to consume Ollama service, modified Ollama readme and added UT.
#998
Signed-off-by: Ye, Xinyu <xinyu.ye@intel.com>
 2025-01-17 16:49:31 +08:00
XinyaoWa
31b9265846 Align OpenAI API for FaqGen, DocSum, TextGen-native (#1161) 
* Align OpenAI API for FaqGen, DocSum, TextGen-native

Algin all the inputs to OpenAI API format for FaqGen, DocSum, TextGen-native, now all the services in llm comps should be OpenAI API compatiable

Related to issue https://github.com/opea-project/GenAIComps/issues/998

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2025-01-17 10:51:54 +08:00
XinyaoWa
a65e559388 Standardize name for LLM comps (#1162) 
Update all the names for classes and files in llm comps to follow the standard format

Related to issue https://github.com/opea-project/GenAIComps/issues/998

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2025-01-16 23:06:47 +08:00
XinyaoWa
d6312a73b9 Fix vllm hpu to a stable release (#1156) 
There exist risks with vllm-fork main branch, change to latest stable release v0.6.4.post2+Gaudi-1.19.0

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2025-01-16 17:48:06 +08:00
XinyaoWa
6d07a064f8 Refactor LLM text generation native comps (#1151) 
Part work of code refactor to combine different text generation backends, remove duplcated native langchain and llama_index folder, consice the optimum habana implementation as a native integration OPEATextGen_Native.

Add feature for issue https://github.com/opea-project/GenAIComps/issues/998

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2025-01-16 13:21:46 +08:00
XinyaoWa
4c21738ad5 Refactor llm predictionguard (#1143) 
* refactor llm predictionguard

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* refine predictionguard ut

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* remove duplicated dockerfile path

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
Co-authored-by: ZePan110 <ze.pan@intel.com>
 2025-01-15 10:13:42 +08:00
XinyaoWa
afb8a28b2f remove vllm hpu commit id limit (#1139) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2025-01-14 11:05:05 +08:00
XinyaoWa
88f93733b0 Refactor llm Docsum (#1101) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2025-01-13 15:24:43 +08:00
XinyaoWa
ea72c943bd Refactor FaqGen (#1093) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2025-01-13 11:30:59 +08:00
ZePan110
b933b66f15 Check duplicated dockerfile (#1073) 
Signed-off-by: ZePan110 <ze.pan@intel.com>
 2025-01-06 17:27:59 +08:00
XinyaoWa
679e6664d4 Rename streaming to stream to align with OpenAI API (#1098) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2025-01-06 13:25:47 +08:00
chen, suyue
f57e30dde6 GenAIComps microservices refactor (#1072) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Signed-off-by: lvliang-intel <liang1.lv@intel.com>
Signed-off-by: letonghan <letong.han@intel.com>
Signed-off-by: Wang, Kai Lawrence <kai.lawrence.wang@intel.com>
Signed-off-by: Wang, Xigui <xigui.wang@intel.com>
Signed-off-by: chensuyue <suyue.chen@intel.com>
Signed-off-by: WenjiaoYue <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>
 2025-01-02 16:31:01 +08:00
XinyaoWa
45d0002057 DocSum Long Context add auto mode (#1046) 
* docsum refine mode promt update

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* docsum vllm requirement update

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* docsum add auto mode

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix readme

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* refine

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2024-12-20 11:03:54 +08:00
XinyaoWa
5aba3b25cf Support Long context for DocSum (#981) 
* docsum four

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* support 4 modes for docsum

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* refine for docsum tgi

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* add docsum for ut and vllm

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* fix ut bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix ut bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* set default value

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2024-12-17 14:09:49 +08:00
lkk
ce1faf6ae1 refine tgi doc with default openai format. (#1037) 2024-12-17 10:43:08 +08:00
XinyaoWa
48ed589822 vllm comps support openai API ChatCompletionRequest (#1032) 
* vllm support openai API

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* test_llms_text-generation_vllm_langchain_on_intel_hpu.sh

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix time

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2024-12-13 17:56:24 +08:00
Wang, Kai Lawrence
ddd372d3e4 Remove enforce-eager to enable HPU graphs for better vLLM perf (#954) 
* remove enforce-eager to enable HPU graphs

Signed-off-by: Wang, Kai Lawrence <kai.lawrence.wang@intel.com>

* Increase the llm max timeout in ci for fully warmup

Signed-off-by: Wang, Kai Lawrence <kai.lawrence.wang@intel.com>

---------

Signed-off-by: Wang, Kai Lawrence <kai.lawrence.wang@intel.com>
 2024-12-10 13:19:56 +08:00
ZePan110
f19cf083d1 Rename image names XXX-hpu to XXX-gaudi (#911) 
Signed-off-by: ZePan110 <ze.pan@intel.com>
 2024-11-19 22:06:55 +08:00
XinyaoWa
e1475acb55 vllm hpu fix version for bug fix (#903) 
* vllm test

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix vllm hpu version to fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* refine readme

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix vllm version

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* update vllm ut model

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* revert agent

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2024-11-15 15:10:27 +08:00
senhui2intel
52757b382c Enable Intel ARC gpu test for vllm openvino. (#856) 
Signed-off-by: senhui2intel <senhui.zhang@intel.com>
Co-authored-by: chen, suyue <suyue.chen@intel.com>
 2024-11-08 22:38:27 +08:00
XinyaoWa
617e119f67 Remove useless vllm ray (#859) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2024-11-08 13:04:19 +08:00
XinyaoWa
786cabe57d align vllm hpu version to latest vllm-fork (#860) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
 2024-11-07 14:14:58 +08:00
lvliang-intel
618f45bab1 Upgrade habana docker version to 1.18.0 (#854) 
* Upgrade habana docker version to 1.18.0

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* fix issues

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* fix ci issue

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

---------

Signed-off-by: lvliang-intel <liang1.lv@intel.com>
 2024-11-07 11:28:48 +08:00
Abolfazl Shahbazi
4f5010cfbb add 'no-cache-dir' to all pip installs (#777) 
* add 'no-cache-dir' to all pip installs

Signed-off-by: Abolfazl Shahbazi <abolfazl.shahbazi@intel.com>

* Fix a malformed line break

Signed-off-by: Abolfazl Shahbazi <abolfazl.shahbazi@intel.com>

---------

Signed-off-by: Abolfazl Shahbazi <abolfazl.shahbazi@intel.com>
 2024-10-10 11:09:47 +08:00
chen, suyue
c4f9083c80 Fix image build (#737) 
Signed-off-by: chensuyue <suyue.chen@intel.com>
 2024-09-27 15:37:17 +08:00
XinyaoWa
3a31295ef8 Align parameters for "max_token, repetition_penalty,presence_penalty,frequency_penalty" (#608) 
* align max_tokens

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* aligin repetition_penalty

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* align penalty parameters

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* align max_tokens

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* debug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* debug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* fix langchain version bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* fix langchain version bug

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

---------

Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: kevinintel <hanwen.chang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
Co-authored-by: lvliang-intel <liang1.lv@intel.com>
 2024-09-18 20:39:23 +08:00
liuzhenwei
2e41dcf960 Support Llama index for vLLM native (#692) 
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
 2024-09-18 07:12:44 +08:00
Sharan Shirodkar
391c4a5801 Prediction Guard LLM component (#674) 
Signed-off-by: sharanshirodkar7 <ssharanshirodkar7@gmail.com>
 2024-09-17 21:57:06 +08:00
chen, suyue
6ce65514e1 replace langchain/langchain:latest with python:3.11-slim (#669) 
* replace langchain/langchain:latest with python:3.11-slim

Signed-off-by: chensuyue <suyue.chen@intel.com>

* fix test

Signed-off-by: chensuyue <suyue.chen@intel.com>

---------

Signed-off-by: chensuyue <suyue.chen@intel.com>
 2024-09-12 13:24:50 +08:00
lvliang-intel
1b6989797f Add OpenAI client access OPEA microservice UT cases (#653) 
* Add OpeanAI access microservice UT cases

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

* add the absolute path

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* refactor code

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* add openai denpendency

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* install openai in scripts

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

* fix ci issue

Signed-off-by: lvliang-intel <liang1.lv@intel.com>

---------

Signed-off-by: lvliang-intel <liang1.lv@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2024-09-12 00:08:14 +08:00
XinyaoWa
8e3f553a55 Support Llama index for vLLM (#665) 
Signed-off-by: Xinyao Wang <xinyao.wang@intel.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
 2024-09-11 16:59:47 +08:00
Letong Han
bea9bb0242 [Reorg] Reorg Folder to Support Different Vendors (#625) 
Signed-off-by: letonghan <letong.han@intel.com>
Signed-off-by: chensuyue <suyue.chen@intel.com>
 2024-09-10 23:24:09 +08:00